Synthesis

Synopsys synthesis tools have only been available to us in the past year. The documentation that accompanied these tools is quite extensive and very helpful. This and other literature helped in developing script files that could be launched from within the fpga_analyzer. These scripts would elaborate, compile, optimize the design, and prepare report summaries. One advantage of running this tool on an HP station is that multiple jobs could be run concurrently resulting in faster turnaround and more time to try different optimization options. The synthesis process is described in detail in Chapter 3.