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/* Sample Script for Synopsys to Xilinx Using */
/* FPGA Compiler targeting a XC4000EX device */ /* Set the name of the design"s top-level */
TOP = system
F1 = packages
F2 = dpmem
F3 = reg
F4 = reg_le
F5 = add2
F6 = add3
F7 = bit_add
F8 = mult2k4
F9 = madd4
F10 = const
F11 = mult
F12 = DOUBLE_fsm
F13 = ADD_fsm
F14 = IO_fsm
F15 = reg_bank
F16 = SWITCH1
F17 = SWITCH2
F18 = SWITCH3
F19 = SWITCH4
F20 = SWITCH5
F21 = add_array_lower
F22 = add_bank
F23 = HYBMULT
designer = "Martin Rosner"
company = "WPI Crypto Group"
part = "4062XLPG475-1"
In this part you can define all variables that you will use
throughout the script including all components and the top-level
design name which, in this case, is system. Here you can also
define the part/device that you are compiling for and the designer
and company name.
Cryptography and Information Security Laboratory
1998-09-17