/* --------------------------------------------------------------- */
/* FPGA COMPILER STARTUP FILE - .synopsys_dc.setup */
/* FOR XC4062xl PARTYPES using Xilinx M1.3 */
/* Elliptic Curve Implementation */
/* Martin C. Rosner \pagestyle{headings}
%***********************************************************************
\chapter{\label{chap:synth}Synthesis}
%***********************************************************************
In this section I will try to introduce the synthesis process
done with the Synopsis tools. This is only an introduction
to the entire synthesis process. Naturally, synthesis will differ
from one design to another and this chapter shows only the common
aspects that may become important. The reader is urged to extensively
use the SOLD manual.
\section{Setup Conditions}
All setup conditions are defined in the file \texttt{.synopsys\_dc.setup}.
In this file you should define device libraries and paths to the library
files, path to the working directory, path to design\_ware libraries,
and few other settings such as cache location.
\begin{tiny}
\begin{verbatim}
/* --------------------------------------------------------------- */
/* FPGA COMPILER STARTUP FILE - .synopsys_dc.setup */
/* FOR XC4062xl PARTYPES using Xilinx M1.3 */
/* Elliptic Curve Implementation */
/* Martin C. Rosner 2/17/98 */
/* --------------------------------------------------------------- */
XilinxInstall = get_unix_variable(XILINX);
SynopsysInstall = get_unix_variable(SYNOPSYS);
search_path = { . \
XilinxInstall + /synopsys/libraries/syn \
SynopsysInstall + /libraries/syn }
/* --------------------------------------------------------------- */
/* Define a work library. You must create the subdirectory 'work' */
/* --------------------------------------------------------------- */
define_design_lib WORK -path ./WORK
/* --------------------------------------------------------------- */
/* Declare the use of the Xilinx DesignWare library for use during */
/* synthesis. Here I select the XC4000E DesignWare library */
/* --------------------------------------------------------------- */
define_design_lib xdw_4000xl \
-path XilinxInstall + /synopsys/libraries/dw/lib/xc4000xl
/* --------------------------------------------------------------- */
/* General configuration settings */
/* --------------------------------------------------------------- */
compile_fix_multiple_port_nets = true
xnfout_constraints_per_endpoint = 0
xnfout_library_version = "2.0.0"
bus_naming_style = "%s<%d>"
bus_dimension_separator_style = "><"
bus_inference_style = "%s<%d>"
cache_read = /local2/martin
cache_write = /local2/martin
xlnx_hier_blknm = 1
/* --------------------------------------------------------------- */
/* output of synlibs -fc 4062xl-1 */
/* --------------------------------------------------------------- */
link_library = {xprim_4062xl-1.db xprim_4000xl-1.db xgen_4000xl.db xfpga_4000xl-1.db xio_4000xl-1.db}
target_library = {xprim_4062xl-1.db xprim_4000xl-1.db xgen_4000xl.db xfpga_4000xl-1.db xio_4000xl-1.db}
symbol_library = {xc4000ex.sdb}
synthetic_library = {xdw_4000xl.sldb standard.sldb}
The libraries defined at the bottom of the setup file
(link_library, target_library, symbol_library, synthetic_library)
are device specific. Consequently this file has to be updated every time
you decide to compile/synthesize for a different device. Not to worry,
as there is an easy way to do that. By using the synlibs command
you can find all libraries necessary for a specific device.
To list all available devices, type synlibs -fc -h. Hopefully
the device you need is there. Then type synlibs -fc part_name
to get the listing of all necessary libraries. You can cut this result and
paste it right into the setup file.