Analog and Mixed Signal VLSI at WPI

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• "Split ADC" Background Linearization of VCO-Based ADCS
• Design of a Sub-Picosecond-Jitter Delay-Lock-Loop for Interleaved ADC Sample Clock Synthesis
• Digital Background Calibration of Redundant Split-Flash ADC in 180nm CMOS
• An 8-b 1GS/s FLASH ADC in 45nm CMOS
• Networked Electrophysiology Sensor-on-a-Chip
• A Real Time Autonomous and Intelligent RF System
• Self-Calibration of a High Resolution Interleaved ADC using the "Split ADC" Architecture
• A Split-ADC Architecture for a Deterministic Digital Background Calibration of a 16b 1MS/s ADC
• Robust Thermal-Noise-Based Random Number Generation for Cryptographic Applications
• Jitter in CMOS Ring Oscillators

• ECE2201 Microelectronics I
• ECE3204 Microelectronics II
• ECE4902 Introduction to Analog IC Design
• ECE524 Advanced Analog Integrated Circuit Design

• Cadence Tutorial
• Publications
• Available Fabrication Technologies at WPI
• List of publications
• Guide to Synthesis and Implementation Tools for VHDL Modeling and Design.

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