1999

• I. Hatirnaz, F.K. Gurkaynak, Y. Leblebici,
  "A Scalable Architecture of Compact Programmable Rank Order Filters Using Capacitive Threshold Logic,"
  accepted for presentation at ECCTD99, 1999 Eurpean Conference on Circuit Theory and Design.

• A. Schmid, David Bowler, Renato Baumgartner, Y. Leblebici,
  "A Novel Analog-Digital Flash Converter Architecture Based on Capacitive Threshold Logic Gates,"
  presented at ISCAS99, 1999 IEEE International Symposium on Circuits and Systems.

• I. Hatirnaz, F.K. Gurkaynak, Y. Leblebici,
  "Realization of a Programmable Rank Order Filter Architecture Using Capacitive Threshold Logic Gates,"
  presented at ISCAS99, 1999 IEEE International Symposium on Circuits and Systems.

1998

• Y. Leblebici and F. K. Gürkaynak,
  "Modular Realization of Threshold Logic Gates for High-Performance Digital Signal Processing Applications",
  presented at the 11th Annual IEEE 1998 International ASIC Conference, September 1998.

• F. K. Gurkaynak, Y. Leblebici, and D. Mlynek,
  "A Compact High-Speed Hamming Distance Comparator for Pattern Matching Applications",
  presented at the IX. European Signal Processing Conference, September 1998.

• A. Schmid, Y. Leblebici and D. Mlynek,
  "A mixed analog-digital artificial neural network architecture with on-chip learning",
  Accepted for publication in the IEEE Transactions on VLSI Systems.

• A. Schmid, Y. Leblebici and D. Mlynek,
  "Hardware realization of a Hamming neural network with on-chip learning",
  Presented at the 1998 IEEE International Symposium on Circuits and Systems, June 1998.

• Y. Leblebici, F. K. Gürkaynak, and D. Mlynek,
  "A Compact 31-Input Programmable Majority Gate Based on Capacitive Threshold Logic",
  Presented at the 1998 IEEE International Symposium on Circuits and Systems, June 1998.

• J. McNeill,
  "Improved Efficiency Fan Speed Control",
  Ideas for Design, Electronic Design Magazine, accepted for publication, June, 1998.

• J. Stander, J. McNeill and R. Ludwig,
  "Multi-Probe Impedance Measurement System for Non-Destructive Evaluation and Test of 'Green State' Powder Metallurgy Parts",
  1998 IEEE Instrumentation and Measurement Technology Conference (IMTC98), Minneapolis, MN, May, 1998.

• A. Schmid, Y. Leblebici and D. Mlynek,
  "A Compact Charge-Based 4-Bit Flash ADC Circuit Architecture for ANN Applications",
  IEE Electronics Letters, vol.34, no.8, p. 784-6, April 1998.

• J. McNeill,
  "Boost Converter Provides Temperature-Controlled Operation of 12V Fan from +5V Supply, ",
  Design Idea EDN Magazine, pp. 98-100, December 18, 1997.

• A. E. Emanuel and J. McNeill,
  "Electric Power Quality",
  Annual Review of Energy and the Environment, vol. 22, pp. 263-304, December, 1997.

• A. Schmid, Y. Leblebici and D. Mlynek,
  "A charge-based artificial neural network with on-chip learning ability",
  invited paper at the 1997 European Congress on Intelligent Techniques and Soft Computing, September 1997.

• J. McNeill, R. Vaz
  "Integrating Mixed Signal IC Design Research into a Project-based Undergraduate Microelectronics Curriculum, "
  Proceedings of the 1997 IEEE Computer Society International Conference on Microelectronic Systems Education (MSE'97), Arlington, VA, July, 1997.

• J. McNeill,
  "Jitter in ring oscillators",
  IEEE Journal of Solid-State Circuits, vol. 32, no. 6, pp. 870-879, June, 1997.

• B. Onat, J. McNeill, and U. Cilingiroglu,
  "Implementation of a charge-based neural Euclidean classifier for a 3-bit flash analog-to-digital converter",
  IEEE Transactions on Instrumentation and Measurement, vol. 46, no. 3, pp. 672-677, June, 1997.

• Y. Leblebici, A. Kepkep, F. K. Gürkaynak, H.Özdemir, and U. Çilingiroglu,
  "Fully Programmable Real Time (3x3) Image Filter Based on Capacitive Threshold-Logic Gates,"
  In Proc. of IEEE International Symposium on Circuits and Systems 1997, pp 2072-2075, June 1997.

• H. Oner, B. Bayrakci and Y. Leblebici,
  "A compact monitoring circuit for real-time on-chip diagnosis of hot-carrier induced degradation",
  Proc. 1997 IEEE International Conference on Microelectronic Test Structures, pp. 72-76, March 1997.

• J. Stander, J. Plunkett, W. Michalson, J. McNeill, and R. Ludwig,
  "A Novel Multi-Probe Resistivity Approach to Inspect Green-State Metal Powder Compacts",
  Journal of Nondestructive Evaluation, vol. 16, no. 4, pp. 205-214, 1997.

• J. McNeill, C. Raanes, and J. Stander,
  "A CMOS analog integrated circuit for detector readout at a 50MHz pixel rate",
  22nd International Congress on High Speed Photography and Photonics, Dennis L. Paisley, Editor, Proc. SPIE vol. 2869 (October, 1996).

• H. Özdemir, A. Kepkep, B. Pamir, Y. Leblebici, and U. Çilingiroglu,
  "A Capacitive Threshold-Logic Gate",
  IEEE Journal of Solid State Circuits , vol SC-31,pp.1141-1149, August, 1996.

• Y. Leblebici, H. Özdemir, A. Kepkep, and U. Çilingiroglu,
  "A Compact Parallel (31,5)-Counter Circuit Based on Capacitive Threshold-Logic Gates",
  IEEE Journal of Solid State Circuits , vol SC-31, pp.1177-1183, August, 1996.

• Y. Leblebici
  "Design Considerations for CMOS Digital Circuits with Improved Hot-Carrier Reliability",
  ESSCIRC-95 Special Issue of the IEEE Journal of Solid State Circuits , vol SC-31, pp.1014-1024, July, 1996.

• J. Stander, J. Plunkett, D. Zenger, J. McNeill, and R. Ludwig,
  "Electric resistivity testing of green-state powdered metallurgy components",
  23rd Annual Review of Progress in Quantitative Nondestructive Evaluation, July, 1996.
  
  
• J. McNeill and R. Vaz,
  "High Expectations: A Passport to Student Success",
  Ninth International Conference on the First Year Experience, St. Andrews, Scotland, July, 1996 .
  

• Y. Leblebici, H. Ozdemir, A. Kepkep and U. Cilingiroglu,
  "A compact parallel (31,5)-counter circuit based on capacitive threshold-logic gates",
  Proc. 1995 European Solid-State Circuits Conference, pp. 390-393, September 1995.
  
  
• Y. Leblebici, H. Ozdemir, A. Kepkep and U. Cilingiroglu,
  "A compact (8x8)-bit serial-parallel multiplier based on capacitive threshold logic",
  Proc. 1995 European Solid-State Circuits Conference, pp. 55-58, August 1995.
  
  
• Y. Leblebici,
  "CMOS digital circuit design guidelines for improved long-term reliability",
  Proc. 1995 European Solid-State Circuits Conference, pp. 274-277, September 1995.
  
  
• Y. Leblebici,
  "Design considerations for tapered CMOS inverter chains with improved hot-carrier reliability",
  Proc. 1995 European Conference on Circuit Theory and Design, pp. 167-170, August 1995.
  
  
• B. Onat, J. McNeill, and U. Cilingiroglu,
  "A neural Euclidean classifier utilizing a purely capacitive synaptic matrix",
  Proceedings of the European Conference on Circuit Theory and Design (ECCTD95), [Istanbul, Turkey], August, 1995.
  
  
• B. Onat, J. McNeill, and U. Cilingiroglu,
  "Implementation of a charge-based neural Euclidean classifier for a 3-bit flash analog-to-digital converter",
  Proceedings of the IEEE Instrumentation and Measurement Technology Conference (IMTC95), [Waltham, MA], pp. 834-839, April, 1995.
  
  
• Y. Leblebici, M.S. Unlu, S.M. Kang and B. Onat,
  "Transient simulation of heterojunction photodiodes, Part I : Computational methods",
  IEEEJournal of Lightwave Technology, vol. 13, pp. 396-405, March 1995.
  
  
• M.S. Unlu, B. Onat and Y. Leblebici,
  "Transient simulation of heterojunction photodiodes, Part II : Analysis of resonant cavity enhanced photodetectors",
  IEEE Journal of Lightwave Technology, vol. 13, pp. 406-415, March 1995.
  
  

• J. A. McNeill,
  "Interpolating ring VCO with V-to-F linearity compensation",
  Electronics Letters, vol. 30, no. 24, pp. 2003-2004, November 24, 1994.

• W. J. Bowhers and J. A. McNeill,
  "Design of an integrated ATE amplifier",
  Won conference award for outstanding student paper.
  Proceedings of the IEEE Systems Readiness Technology Conference (AUTOTESTCON), [Anaheim, CA], pp. 745-748, September, 1994
  
  
• J.J. Morikuni, A. Dharchoudhury, Y. Leblebici and S.M. Kang,
  "Improvements to the standard theory of photoreceiver noise",
  IEEE Journal of Lightwave Technology, vol. 12, pp. 1174-1184, July 1994
  
  
• Y. Leblebici and S.M. Kang,
  "Simulation of hot-carrier induced MOS circuit degradation for VLSI reliability analysis",
  IEEE Transactions on Reliability, vol. 43, pp. 197-206, June 1994.
  
  
• J. A. McNeill, R. Croughwell, L. DeVito, and A. Gusinov,
  "A 150 mW, 155 MHz phase locked loop with low jitter VCO",
  Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), [London, U.K.], vol. 3, pp. 49-52, May, 1994.
  
  
• J. A. McNeill,
  "Low power circuit techniques for generating kilovolt 'staircase' waveforms",
  Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), [London, U.K.], vol. 6, pp. 185-188, May, 1994
  
  
• J. A. McNeill,
  "Jitter in ring oscillators",
  Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), [London, U.K.], vol. 6, pp. 201-204, May, 1994
  
  
• M.S. Unlu, B. Onat and Y. Leblebici,
  "Transient simulation of optoelectronic integrated circuits using SPICE",
  roc. 1994 OSA Integrated Photonics Research Symposium, pp. 228-229, January 1994.
  
  

• M.S. Unlu, B. Onat and Y. Leblebici,
  "A novel method for large signal transient simulation of opto-electronic integrated circuits",
  Proc. 1993 International Symposium on Device Research, December 1-3, 1993.
  
  
• J. A. McNeill,
  "Simple circuits for generating high-voltage staircase waveforms",
  IEEE Transactions on Instrumentation and Measurement, vol. 42, pp. 1026-1031, December, 1993.

• Y.H. Shih, Y. Leblebici and S.M. Kang,
  "ILLIADS: A fast timing and reliability simulator for digital MOS circuits",
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. CAD-13, pp. 1387-1402, September 1993.
  
  
• J. A. McNeill,
  "'Piecewise-quadratic' synthesis of an exponential characteristic with an array of square-law MOSFETs",
  Proceedings of the IEEE International ASIC Conference [Rochester, NY], pp. 31-34, September, 1993.
  
  
• Y. Leblebici and S.M. Kang,
  "Modeling and simulation of hot-carrier induced device degradation in MOS circuits",
  IEEE Journal of Solid-State Circuits, vol. 28, pp. 585-595, May 1993.
  
  
• W. Jansz, W. Sun, Y. Leblebici and S.M. Kang,
  "Fast hot-carrier reliability diagnosis using macro-models",
  Proc. 1993 International Symposium on VLSI Technology, Systems, and Applications, pp. 128-132, May 1993.
  
  
• Y. Leblebici and S.M. Kang,
  "Parametric macro-modeling of hot-carrier induced dynamic degradation in MOS VLSI circuits",
  IEEE Transactions on Electron Devices, vol. 40, pp. 673-676, March 1993.
  
  

• Y. Leblebici, M.S. Unlu and S.M. Kang,
  "A novel method for mixed device/circuit simulation of optoelectronic integrated circuits",
  Proc. 1992 IEEE Asia-Pacific Conference on Circuits and Systems, pp. 460-465, December 1992.
  
  
• M.S. Unlu, Y. Leblebici, S.M. Kang and H. Morkoc,
  "Transient simulation of resonant cavity enhanced heterojunction photodiodes",
  IEEE Photonics Technology Letters, vol. 4, pp. 1366-1369, December 1992.
  
  
• W. Sun, Y. Leblebici and S.M. Kang,
  "A parametric macro-model approach for hot-carrier resistant CMOS VLSI design",
  Proc. 1992 IEEE Custom Integrated Circuits Conference, pp. 18.3.1-18.3.4, May 1992.
  
  
• W. Sun, Y. Leblebici and S.M. Kang,
  "Design-for-reliability rules for hot-carrier resistant CMOS VLSI circuits",
  Proc. 1992 IEEE International Symposium on Circuits and Systems, pp. 1254-1257, May 1992.
  
  
• Y. Leblebici, M.S. Unlu, H. Morkoc and S.M. Kang,
  "One-dimensional transient device simulation using a direct method circuit simulator",
  Proc. 1992 IEEE International Symposium on Circuits and Systems, pp. 895-898, May 1992.
  
  
• Y. Leblebici and S.M. Kang,
  "Modeling of nMOS transistors for simulation of hot-carrier induced device and circuit degradation",
  IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. CAD-11, pp. 235-246, February 1992.
  
  

• Y.H. Shih, Y. Leblebici and S.M. Kang,
  "New simulation methods for MOS VLSI timing and reliability",
  Proc. 1991 IEEE International Conference on Computer-Aided Design, pp. 162-165, November 1991.
  
  
• Y. Leblebici, P.C. Li, S.M. Kang and I.N. Hajj,
  "Hierarchical simulation of hot-carrier induced damages in VLSI circuits",
  Proc.1991 IEEE Custom Integrated Circuits Conference, pp. 29.3.1-29.3.4, May 1991.
  
  
• C.H. Diaz, S.M. Kang and Y. Leblebici,
  "An accurate analytical delay model for BiCMOS driver circuits",
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. CAD-10, pp. 577-588, May 1991.
  
  
• C. A. Raanes, J. A. McNeill, A. P. Cunningham,
  "A multiple-channel correlated double sampling amplifier hybrid to support a 64 parallel output CCD array",
  19th International Congress on High Speed Photography and Photonics, Peter W. Fuller, Brian Garfield, John Rendell, Editors, Proc. SPIE 1358, pp. 637-643, 1991.
  
  

• Y. Leblebici and S.M. Kang,
  "Simulation of MOS circuit performance degradation with emphasis on VLSI design-for reliability",
  Proc. 1990 IEEE International Conference on Computer Design, pp. 400-403, November 1990.
  
  
• Y. Leblebici and S.M. Kang,
  "An integrated reliability simulation tool for hot-carrier resistant VLSI design",
  Proc. TECHCON 1990 Conference, pp. 102-105, October 1990.
  
  
• C.H. Diaz, S.M. Kang and Y. Leblebici,
  "An accurate analytical delay model for BiCMOS driver circuits",
  Proc. 1990 IEEE International Symposium on Circuits and Systems, pp. 558-561, May 1990.
  
  
• Y. Leblebici and S.M. Kang,
  "A one-dimensional MOSFET model for simulation of hot-carrier induced device and circuit degradation",
  Proc. 1990 IEEE International Symposium on Circuits and Systems, pp. 109-112, May 1990.
  
  
• J. A. McNeill, C. A. Raanes,
  "Fast framing detector systems for sensor applications",
  Ultrahigh Speed and High Speed Photography, Photonics, and Videography '89, Gary L. Stradling, Editor, Proc. SPIE 1155, pp. 80-88 (1990).
  
  

• Y. Leblebici and S.M. Kang,
  "Simulation of MOS circuit performance degradation with emphasis on VLSI design-for reliability",
  Proc. 1989 IEEE International Conference on Computer Design, pp. 492-495, October 1989.
  
  

• S.M. Kang and Y. Leblebici,
  "An efficient method for circuit sensitivity calculation using piecewise linear waveform models",
  Proc. 1988 IEEE International Conference on Computer Aided Design, pp. 24-27, November 1988.
  
  

• Y. Leblebici, S.M. Kang, C.T. Sah and T. Nishida,
  "Modeling and simulation of hot electron effects for VLSI reliability",
  Proc. 1987 IEEE International Conference on Computer Aided Design, pp. 252-255, November 1987.
  
  

• Y. Leblebici and A. Dervisoglu,
  "Investigation and comparison of computer-aided methods for determination of circuit functions",
  Proc. National Conference on Electrical Engineering, Adana, Turkey, September 1985.
  
  

• Y. Leblebici and A. Dervisoglu,
  "Computer-aided circuit analysis using modified nodal equations",
  Proc. Electrical Energy Symposium, Istanbul, Turkey, October 1984.
  
  

• J. McNeill,
  "Integrated Communications (ICOM)",
  General Electric Advanced Development Engineering Technical Publications, Memo 288 (1982).